Posted 6 days ago
The Senior ASIC/FPGA Design Verification Engineer develops, verifies, and delivers standards-compliant IP blocks for FPGA and ASIC products. Responsibilities include architecting SystemVerilog/UVM verification environments, developing test plans and test cases, tracking bugs, streamlining development processes, collaborating with customers and engineers, and mentoring junior engineers.
Posted 6 days ago
The Senior Staff IC/FPGA Design Verification Engineer will lead verification for high-speed interconnect ASICs and FPGAs, delivering standards-compliant IP blocks and subsystems. Responsibilities include architecting SystemVerilog/UVM verification environments, developing test plans and test cases, driving verification closure and issue resolution, and mentoring engineers while collaborating across technical teams.
Posted 25 days ago
Qualcomm is hiring a 16-month Silicon Validation Intern in Toronto to support validation of high-speed SerDes and Die-to-Die IP prototypes. Responsibilities include characterizing analog blocks, bringing up and debugging silicon, creating test plans and scripts, automating test equipment and analysis, and evaluating signal and power integrity.
Posted 25 days ago
Qualcomm is hiring interns for its Firmware/Embedded Software Engineering team in Toronto and Ottawa, supporting embedded firmware and SDK development as well as tooling, test automation, and continuous integration. Interns will write and debug C firmware, extend C and Python SDKs, build automation and debugging tools, and help validate and bring up silicon alongside cross-functional engineering teams.
Posted 25 days ago
The intern will work with Qualcomm’s Low Power AI software engineering team to develop software frameworks for a low-power AI accelerator and support edge AI applications. The role provides hands-on exposure to the machine learning software stack, customer issue handling, and collaboration within a technical team.
Posted 25 days ago
The Design Methodology Engineering Intern will help improve semiconductor back-end design workflows, optimize power, performance, and area, and use AI/ML and LLM solutions to increase design productivity. Responsibilities include scripting and benchmarking flows, supporting physical synthesis and timing closure, and conducting physical verification and EM/IR analysis.
Posted 25 days ago
The Physical Mixed Layout Engineering Intern will support Qualcomm’s design team in developing and optimizing physical mixed-signal layouts for integrated circuits. Responsibilities include assisting with floorplanning, placement, routing, layout verification, design reviews, and troubleshooting while coordinating with senior engineers and cross-functional teams. The internship provides exposure to the chip design process from concept to production.
Posted 25 days ago
The FY27 Analog Design Intern will work with Qualcomm’s Toronto analog design team to validate circuit performance, model analog behavior using SystemVerilog, run AMS co-simulations, and propose design and verification strategies. Responsibilities also include presenting simulation results, documenting design and testbench metrics, and collaborating with analog, digital, firmware, and system teams.
Posted a month ago
This Qualcomm internship in Markham supports design, verification, and modeling of low-power AI, audio, and sensor ASIC hardware subsystems. Interns contribute to ASIC design and implementation or design verification, including RTL development, simulation, testbench work, automation, and power, area, and performance optimization.
Posted a month ago
The intern will support Qualcomm’s low-power AI, audio, and sensors hardware teams by developing and debugging firmware and use cases, validating ASIC IP and AI/audio hardware, and measuring system performance. The role involves working across design, verification, software, and architecture teams, using C/C++/Python, emulation and development hardware, and diagnostic equipment.
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